Devine Lu Linvega
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3f5e099051
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Merged right hand side of compiler
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2024-04-24 15:01:47 -07:00 |
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Devine Lu Linvega
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3dbb23319e
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Break out of compilation early
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2024-04-24 14:54:40 -07:00 |
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Devine Lu Linvega
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dfe9b076dc
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Merged rule compilation for left side
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2024-04-24 14:31:17 -07:00 |
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Devine Lu Linvega
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97d406c3a8
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Progress on rules compilation
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2024-04-24 14:22:23 -07:00 |
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Devine Lu Linvega
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53ef87a4b9
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Inlined parse_frag
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2024-04-24 14:03:14 -07:00 |
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Devine Lu Linvega
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9d4d20e542
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Housekeeping
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2024-04-24 13:49:21 -07:00 |
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Devine Lu Linvega
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bcbfe02783
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Progress in merging parsers
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2024-04-24 13:45:08 -07:00 |
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Devine Lu Linvega
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23ec4856e0
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Road to merging frag parsing and rule compilation
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2024-04-24 13:41:09 -07:00 |
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Devine Lu Linvega
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76fe5830be
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Abstracted reg lookup
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2024-04-24 13:35:12 -07:00 |
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Devine Lu Linvega
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986a1b47dd
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Only get reg id once
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2024-04-24 11:20:34 -07:00 |
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Devine Lu Linvega
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3136ae834f
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Walk over incompiled registers
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2024-04-24 11:18:06 -07:00 |
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Devine Lu Linvega
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4535c11017
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Limit matches queries
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2024-04-24 11:12:57 -07:00 |
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Devine Lu Linvega
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c63021cf03
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Houeskeeping
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2024-04-24 10:39:14 -07:00 |
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Devine Lu Linvega
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b866c69776
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Compile rules
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2024-04-24 10:31:46 -07:00 |
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Devine Lu Linvega
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c73b9f0ad7
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Housekeeping
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2024-04-23 20:20:31 -07:00 |
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Devine Lu Linvega
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8bb661ced0
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Converted regs array to stack
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2024-04-23 19:36:49 -07:00 |
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Devine Lu Linvega
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3c85bbd3b8
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Exploding empty list -> identity
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2024-04-23 13:51:25 -07:00 |
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Devine Lu Linvega
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a111783887
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Fixed bug with counting parens
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2024-04-23 09:35:58 -07:00 |
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Devine Lu Linvega
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95d8bf3d8e
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Special registers that are non-emitting should erase themselves
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2024-04-22 21:37:40 -07:00 |
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Devine Lu Linvega
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157d1909ea
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Added comments
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2024-04-22 20:50:39 -07:00 |
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Devine Lu Linvega
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91150500dd
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Removed unecessary assign
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2024-04-22 20:32:42 -07:00 |
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Devine Lu Linvega
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b67cf12f60
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Use switch case for special registers
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2024-04-22 20:22:54 -07:00 |
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Devine Lu Linvega
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f7e0e74888
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Moved lambda from rules[0] to its own memory
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2024-04-22 20:15:33 -07:00 |
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Devine Lu Linvega
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701d2c43a5
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Do not continue after lambda rewrite
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2024-04-22 20:13:19 -07:00 |
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Devine Lu Linvega
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ba48cfffa6
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Rewind
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2024-04-22 20:08:29 -07:00 |
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Devine Lu Linvega
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9c95b4567b
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Return lambda to its own memory
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2024-04-22 18:02:27 -07:00 |
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Devine Lu Linvega
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7a27c2ca5b
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Housekeeping
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2024-04-22 17:54:17 -07:00 |
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Devine Lu Linvega
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9b034eac95
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Merged all regs needing functions
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2024-04-22 17:43:35 -07:00 |
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Devine Lu Linvega
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4fce0e83e5
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Abstracted match/write rule
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2024-04-22 17:39:39 -07:00 |
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Devine Lu Linvega
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8e7bbb51d7
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Store lambda in rules[0]
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2024-04-22 17:27:34 -07:00 |
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Devine Lu Linvega
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e153eb797b
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Print unused rules
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2024-04-22 15:29:54 -07:00 |
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Devine Lu Linvega
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6fb9f96b0c
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Oups
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2024-04-22 10:10:55 -07:00 |
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Devine Lu Linvega
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aa0cc80455
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Inlined set_reg
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2024-04-22 09:54:41 -07:00 |
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Devine Lu Linvega
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ed5c0763e2
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Warn on imbalance
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2024-04-21 09:46:53 -07:00 |
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Devine Lu Linvega
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05e620bac5
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Inlined create_rule
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2024-04-21 09:24:05 -07:00 |
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Devine Lu Linvega
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73e9ebcfdd
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Only check for register value once
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2024-04-21 09:13:30 -07:00 |
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Devine Lu Linvega
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7a124eb70f
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Do not pass last to write_rule
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2024-04-20 22:31:58 -07:00 |
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Devine Lu Linvega
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222c7f6f4c
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Blacklist ?) register
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2024-04-20 21:50:56 -07:00 |
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Devine Lu Linvega
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4322d96ee2
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Improved native substring capabilities
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2024-04-20 18:56:04 -07:00 |
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Devine Lu Linvega
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529777fcb4
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Can merge token during reg writing
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2024-04-20 12:06:32 -07:00 |
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Devine Lu Linvega
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9029c64c77
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A register is surrounded by spacers
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2024-04-20 12:00:25 -07:00 |
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Devine Lu Linvega
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b725a608da
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Escape question marks
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2024-04-20 11:26:57 -07:00 |
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Devine Lu Linvega
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f139f3218e
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Do not injest register on empty put_reg
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2024-04-20 11:09:43 -07:00 |
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Devine Lu Linvega
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6a61088a70
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Use cached data in register
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2024-04-20 11:01:20 -07:00 |
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Devine Lu Linvega
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0e6e963425
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Fixed issue with matching tokens of different length
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2024-04-19 14:08:18 -07:00 |
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Devine Lu Linvega
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f35eb2c8ec
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Added quiet/infinite flags
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2024-04-18 11:33:23 -07:00 |
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Devine Lu Linvega
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7a93de35ad
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Fixes issue with trailing ws
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2024-04-17 11:40:47 -07:00 |
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Devine Lu Linvega
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88649fce12
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Fixes whitespace bug
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2024-04-17 11:18:37 -07:00 |
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Devine Lu Linvega
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6e0d3bb9e0
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New explode/join registers
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2024-04-17 10:35:40 -07:00 |
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Devine Lu Linvega
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3bce3dab79
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Added align register
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2024-04-17 09:17:31 -07:00 |