Devine Lu Linvega
6fb9f96b0c
Oups
2024-04-22 10:10:55 -07:00
Devine Lu Linvega
aa0cc80455
Inlined set_reg
2024-04-22 09:54:41 -07:00
Devine Lu Linvega
94d9ecfa72
Renamed shirt.modal to postcard.modal
2024-04-21 19:34:43 -07:00
Devine Lu Linvega
150d0ff032
Improved init for sierpinski
2024-04-21 18:06:08 -07:00
Devine Lu Linvega
0be295a237
Added sierpinski to examples/
2024-04-21 16:47:27 -07:00
Devine Lu Linvega
ed5c0763e2
Warn on imbalance
2024-04-21 09:46:53 -07:00
Devine Lu Linvega
111e143d2f
Added tests
2024-04-21 09:43:00 -07:00
Devine Lu Linvega
05e620bac5
Inlined create_rule
2024-04-21 09:24:05 -07:00
Devine Lu Linvega
73e9ebcfdd
Only check for register value once
2024-04-21 09:13:30 -07:00
Devine Lu Linvega
a2f60e12ff
Removed old test
2024-04-20 22:34:28 -07:00
Devine Lu Linvega
7a124eb70f
Do not pass last to write_rule
2024-04-20 22:31:58 -07:00
Devine Lu Linvega
222c7f6f4c
Blacklist ?) register
2024-04-20 21:50:56 -07:00
Devine Lu Linvega
4322d96ee2
Improved native substring capabilities
2024-04-20 18:56:04 -07:00
Devine Lu Linvega
9295a4d2b4
Added tests
2024-04-20 12:38:05 -07:00
Devine Lu Linvega
529777fcb4
Can merge token during reg writing
2024-04-20 12:06:32 -07:00
Devine Lu Linvega
9029c64c77
A register is surrounded by spacers
2024-04-20 12:00:25 -07:00
Devine Lu Linvega
b725a608da
Escape question marks
2024-04-20 11:26:57 -07:00
Devine Lu Linvega
f139f3218e
Do not injest register on empty put_reg
2024-04-20 11:09:43 -07:00
Devine Lu Linvega
6a61088a70
Use cached data in register
2024-04-20 11:01:20 -07:00
Devine Lu Linvega
0e6e963425
Fixed issue with matching tokens of different length
2024-04-19 14:08:18 -07:00
Devine Lu Linvega
6f89fb02bc
Added postcard example
2024-04-19 11:10:37 -07:00
Devine Lu Linvega
bc3165d7e6
Added documentation for flags
2024-04-18 11:45:32 -07:00
~d6
a80a5ab826
Merge remote-tracking branch 'upstream/master' into d6/binary
2024-04-18 14:35:36 -04:00
Devine Lu Linvega
f35eb2c8ec
Added quiet/infinite flags
2024-04-18 11:33:23 -07:00
~d6
055829dc07
Merge remote-tracking branch 'origin/d6/binary' into d6/binary
2024-04-18 14:22:49 -04:00
~d6
36195fce6d
Merge remote-tracking branch 'upstream/master' into d6/binary
2024-04-18 14:22:28 -04:00
~d6
85884df6a3
Add two new options for modal:
...
-n do not enforce cycle limit
-q do not emit rules on STDERR, equivalent to 2>/dev/null
Really, -n uses 0xffffffff as the new cycle limit, which is
large enough that it's unlikely to be a problem.
2024-04-18 14:07:44 -04:00
Devine Lu Linvega
40ef57ebf5
Added fizzbuzz example
2024-04-18 11:00:08 -07:00
~d6
9ebbcf7d08
udpate to new ?^ register
2024-04-18 10:25:07 -04:00
~d6
dcd8b283e5
Merge remote-tracking branch 'upstream/master' into d6/binary
2024-04-18 10:22:21 -04:00
Devine Lu Linvega
21782ba7ba
Added a test for self-erasing token
2024-04-17 11:49:32 -07:00
Devine Lu Linvega
7a93de35ad
Fixes issue with trailing ws
2024-04-17 11:40:47 -07:00
Devine Lu Linvega
88649fce12
Fixes whitespace bug
2024-04-17 11:18:37 -07:00
Devine Lu Linvega
44e809f092
Updated tests to match new registers
2024-04-17 10:56:51 -07:00
Devine Lu Linvega
6e0d3bb9e0
New explode/join registers
2024-04-17 10:35:40 -07:00
Devine Lu Linvega
3bce3dab79
Added align register
2024-04-17 09:17:31 -07:00
Devine Lu Linvega
9dd3439986
Added unpack register
2024-04-17 08:47:39 -07:00
~d6
ec48109bfe
optimizations, ostr, hstr, etc
2024-04-16 23:53:36 -04:00
~d6
ff919d23c8
Merge remote-tracking branch 'upstream/master' into d6/binary
2024-04-16 17:57:25 -04:00
Devine Lu Linvega
2449bac4ad
Faster register clear
2024-04-16 14:45:56 -07:00
~d6
cf4db4ae76
Merge remote-tracking branch 'upstream/master' into d6/binary
2024-04-16 17:25:53 -04:00
Devine Lu Linvega
8df2a496cc
Reduce register clearing tasks
2024-04-16 13:51:34 -07:00
Devine Lu Linvega
acb655ad10
Use character in variable
2024-04-16 12:24:57 -07:00
Devine Lu Linvega
84de156184
Added string_join example
2024-04-16 12:17:11 -07:00
Devine Lu Linvega
1fdda010eb
Fixed issue with > as first character
2024-04-16 08:24:55 -07:00
Devine Lu Linvega
b61172d52e
Added guarded test
2024-04-15 20:58:16 -07:00
Devine Lu Linvega
10aa9c8e46
Expanded tests
2024-04-15 20:39:25 -07:00
Devine Lu Linvega
f25d35decf
Expanded tests
2024-04-15 20:13:08 -07:00
Devine Lu Linvega
45e0df792b
Expanded tests
2024-04-15 19:47:11 -07:00
Devine Lu Linvega
08173b4eb9
Starting tests
2024-04-15 17:18:18 -07:00