Commit Graph

296 Commits

Author SHA1 Message Date
Devine Lu Linvega e84ef37c5d Housekeeping 2024-04-28 20:37:53 -07:00
Devine Lu Linvega c9e932765a Added logic operators to ALU 2024-04-28 20:13:51 -07:00
Devine Lu Linvega 0a1b6bfb5c Added rest of ALU 2024-04-28 20:07:41 -07:00
Devine Lu Linvega 25837b08f9 Starting ALU 2024-04-28 19:45:46 -07:00
Devine Lu Linvega 53b89bcf65 Isolated device read/write functions 2024-04-28 18:55:03 -07:00
Devine Lu Linvega 06c5c3c3da Display references in debug 2024-04-28 12:32:46 -07:00
Sebastian LaVine 42ab70b09d Re-add stderr usage
This commit spiritually reverts 392e05d.

With debug messages and interpreter state sent to stderr and the actual
output of the program sent to stdout, it is easier to read both
independently. For instance, one can redirect stdout or stderr to
another terminal window to keep an eye on both outputs independently:

        bin/modal examples/hello.modal >/dev/pts/5
2024-04-28 08:42:25 -07:00
Devine Lu Linvega f5cd5d3fa3 Removed extra check 2024-04-27 21:21:15 -07:00
Devine Lu Linvega 481e2b56cf Housekeeping 2024-04-27 21:12:14 -07:00
Devine Lu Linvega 93326ecf73 Merged rule parsers 2024-04-27 15:06:00 -07:00
Devine Lu Linvega dd1fddb20c Removed rules compilation step 2024-04-27 14:47:06 -07:00
Devine Lu Linvega d520ab8489 Added tests, ignoring empty rules 2024-04-27 12:30:40 -07:00
Devine Lu Linvega 62b8317cc9 Added tests 2024-04-27 11:24:00 -07:00
Devine Lu Linvega 3d01efe11a Print right statement during undefinition 2024-04-27 11:05:50 -07:00
Devine Lu Linvega d03f359f4c Better rules lookup 2024-04-27 10:51:50 -07:00
Devine Lu Linvega f8657a5f67 Display undefinitions 2024-04-27 10:04:01 -07:00
Devine Lu Linvega 1fae8de0d5 rid is always unsigned 2024-04-27 09:48:10 -07:00
Devine Lu Linvega a2ea2a6ac2 Pretty print rules 2024-04-27 09:24:48 -07:00
Devine Lu Linvega 392e05d19e Send everything to stdout 2024-04-27 09:02:56 -07:00
Devine Lu Linvega e83ac9ce02 Display rewrites count 2024-04-27 08:46:31 -07:00
Devine Lu Linvega 8b618d2425 Fixed issue with weird undefinitions 2024-04-26 22:07:53 -07:00
Devine Lu Linvega 06f2cd4487 Do not warn of unused empty rules 2024-04-26 21:37:08 -07:00
Devine Lu Linvega f3d16b4bd6 Fixed issue in undefinition 2024-04-26 21:35:31 -07:00
Devine Lu Linvega 541e8937b0 Unwrap rules during match 2024-04-26 21:18:02 -07:00
Devine Lu Linvega 37effa5dfd Housekeeping 2024-04-26 21:04:54 -07:00
Devine Lu Linvega 49614f1a61 Initial implementation of undefine rules 2024-04-26 20:50:22 -07:00
Devine Lu Linvega a7abb9475a Added tests for formatter 2024-04-26 11:06:30 -07:00
Devine Lu Linvega 3167698795 Print program left-over 2024-04-26 10:42:21 -07:00
Devine Lu Linvega 13359a79cd Fixed issue with catching matches without spaces 2024-04-26 09:02:03 -07:00
Devine Lu Linvega f546e2e016 Fixed compilation bug 2024-04-26 08:54:05 -07:00
Devine Lu Linvega 0f576e8972 Removed debug 2024-04-26 08:28:47 -07:00
Devine Lu Linvega d43eec77f3 Fixed bug with lambda mismatch 2024-04-26 08:05:21 -07:00
Devine Lu Linvega 927479bc44 Fixed issue with invalid lambda 2024-04-25 22:39:37 -07:00
Devine Lu Linvega 2f9f9d7f15 Do not match on substrings 2024-04-25 22:35:15 -07:00
Devine Lu Linvega eaa1f92347 Do not pass regs through funciton 2024-04-25 18:39:17 -07:00
Devine Lu Linvega 47b80e126e Write EOF token via ?~ register 2024-04-25 18:36:45 -07:00
Devine Lu Linvega 88b5c527f4 Beta 2 2024-04-25 12:17:31 -07:00
Devine Lu Linvega f28444f60e Isolated rule finding 2024-04-25 11:08:14 -07:00
Devine Lu Linvega 8cb22a9966 Completed split from match and apply 2024-04-25 10:32:39 -07:00
Devine Lu Linvega 6d10bb3b66 Split apply_rule 2024-04-25 10:12:43 -07:00
Devine Lu Linvega d8325fabcc Removed extra check from apply_rule 2024-04-25 09:48:24 -07:00
Devine Lu Linvega 97f8cf03ac Beta 2024-04-24 20:26:56 -07:00
Devine Lu Linvega 56bb5969ab Added comments 2024-04-24 15:55:48 -07:00
Devine Lu Linvega bd6a194e24 Clean only required registers 2024-04-24 15:46:27 -07:00
Devine Lu Linvega 5ab8e10a6b Housekeeping 2024-04-24 15:34:11 -07:00
Devine Lu Linvega 399ac8dd17 Do no allocate empty cells in dict 2024-04-24 15:17:57 -07:00
Devine Lu Linvega ca76fdd9c3 Removed temporary pointers 2024-04-24 15:08:09 -07:00
Devine Lu Linvega 3f5e099051 Merged right hand side of compiler 2024-04-24 15:01:47 -07:00
Devine Lu Linvega 3dbb23319e Break out of compilation early 2024-04-24 14:54:40 -07:00
Devine Lu Linvega dfe9b076dc Merged rule compilation for left side 2024-04-24 14:31:17 -07:00
Devine Lu Linvega 97d406c3a8 Progress on rules compilation 2024-04-24 14:22:23 -07:00
Devine Lu Linvega 53ef87a4b9 Inlined parse_frag 2024-04-24 14:03:14 -07:00
Devine Lu Linvega 9d4d20e542 Housekeeping 2024-04-24 13:49:21 -07:00
Devine Lu Linvega bcbfe02783 Progress in merging parsers 2024-04-24 13:45:08 -07:00
Devine Lu Linvega 23ec4856e0 Road to merging frag parsing and rule compilation 2024-04-24 13:41:09 -07:00
Devine Lu Linvega 76fe5830be Abstracted reg lookup 2024-04-24 13:35:12 -07:00
Devine Lu Linvega 986a1b47dd Only get reg id once 2024-04-24 11:20:34 -07:00
Devine Lu Linvega 3136ae834f Walk over incompiled registers 2024-04-24 11:18:06 -07:00
Devine Lu Linvega 4535c11017 Limit matches queries 2024-04-24 11:12:57 -07:00
Devine Lu Linvega c63021cf03 Houeskeeping 2024-04-24 10:39:14 -07:00
Devine Lu Linvega b866c69776 Compile rules 2024-04-24 10:31:46 -07:00
Devine Lu Linvega c73b9f0ad7 Housekeeping 2024-04-23 20:20:31 -07:00
Devine Lu Linvega 8bb661ced0 Converted regs array to stack 2024-04-23 19:36:49 -07:00
Devine Lu Linvega 3c85bbd3b8 Exploding empty list -> identity 2024-04-23 13:51:25 -07:00
Devine Lu Linvega a111783887 Fixed bug with counting parens 2024-04-23 09:35:58 -07:00
Devine Lu Linvega 95d8bf3d8e Special registers that are non-emitting should erase themselves 2024-04-22 21:37:40 -07:00
Devine Lu Linvega 157d1909ea Added comments 2024-04-22 20:50:39 -07:00
Devine Lu Linvega 91150500dd Removed unecessary assign 2024-04-22 20:32:42 -07:00
Devine Lu Linvega b67cf12f60 Use switch case for special registers 2024-04-22 20:22:54 -07:00
Devine Lu Linvega f7e0e74888 Moved lambda from rules[0] to its own memory 2024-04-22 20:15:33 -07:00
Devine Lu Linvega 701d2c43a5 Do not continue after lambda rewrite 2024-04-22 20:13:19 -07:00
Devine Lu Linvega ba48cfffa6 Rewind 2024-04-22 20:08:29 -07:00
Devine Lu Linvega 9c95b4567b Return lambda to its own memory 2024-04-22 18:02:27 -07:00
Devine Lu Linvega 7a27c2ca5b Housekeeping 2024-04-22 17:54:17 -07:00
Devine Lu Linvega 9b034eac95 Merged all regs needing functions 2024-04-22 17:43:35 -07:00
Devine Lu Linvega 4fce0e83e5 Abstracted match/write rule 2024-04-22 17:39:39 -07:00
Devine Lu Linvega 8e7bbb51d7 Store lambda in rules[0] 2024-04-22 17:27:34 -07:00
Devine Lu Linvega e153eb797b Print unused rules 2024-04-22 15:29:54 -07:00
Devine Lu Linvega 6fb9f96b0c Oups 2024-04-22 10:10:55 -07:00
Devine Lu Linvega aa0cc80455 Inlined set_reg 2024-04-22 09:54:41 -07:00
Devine Lu Linvega ed5c0763e2 Warn on imbalance 2024-04-21 09:46:53 -07:00
Devine Lu Linvega 05e620bac5 Inlined create_rule 2024-04-21 09:24:05 -07:00
Devine Lu Linvega 73e9ebcfdd Only check for register value once 2024-04-21 09:13:30 -07:00
Devine Lu Linvega 7a124eb70f Do not pass last to write_rule 2024-04-20 22:31:58 -07:00
Devine Lu Linvega 222c7f6f4c Blacklist ?) register 2024-04-20 21:50:56 -07:00
Devine Lu Linvega 4322d96ee2 Improved native substring capabilities 2024-04-20 18:56:04 -07:00
Devine Lu Linvega 529777fcb4 Can merge token during reg writing 2024-04-20 12:06:32 -07:00
Devine Lu Linvega 9029c64c77 A register is surrounded by spacers 2024-04-20 12:00:25 -07:00
Devine Lu Linvega b725a608da Escape question marks 2024-04-20 11:26:57 -07:00
Devine Lu Linvega f139f3218e Do not injest register on empty put_reg 2024-04-20 11:09:43 -07:00
Devine Lu Linvega 6a61088a70 Use cached data in register 2024-04-20 11:01:20 -07:00
Devine Lu Linvega 0e6e963425 Fixed issue with matching tokens of different length 2024-04-19 14:08:18 -07:00
Devine Lu Linvega f35eb2c8ec Added quiet/infinite flags 2024-04-18 11:33:23 -07:00
Devine Lu Linvega 7a93de35ad Fixes issue with trailing ws 2024-04-17 11:40:47 -07:00
Devine Lu Linvega 88649fce12 Fixes whitespace bug 2024-04-17 11:18:37 -07:00
Devine Lu Linvega 6e0d3bb9e0 New explode/join registers 2024-04-17 10:35:40 -07:00
Devine Lu Linvega 3bce3dab79 Added align register 2024-04-17 09:17:31 -07:00
Devine Lu Linvega 9dd3439986 Added unpack register 2024-04-17 08:47:39 -07:00
Devine Lu Linvega 2449bac4ad Faster register clear 2024-04-16 14:45:56 -07:00
Devine Lu Linvega 8df2a496cc Reduce register clearing tasks 2024-04-16 13:51:34 -07:00