Devine Lu Linvega
|
9d4d20e542
|
Housekeeping
|
2024-04-24 13:49:21 -07:00 |
|
Devine Lu Linvega
|
bcbfe02783
|
Progress in merging parsers
|
2024-04-24 13:45:08 -07:00 |
|
Devine Lu Linvega
|
23ec4856e0
|
Road to merging frag parsing and rule compilation
|
2024-04-24 13:41:09 -07:00 |
|
Devine Lu Linvega
|
76fe5830be
|
Abstracted reg lookup
|
2024-04-24 13:35:12 -07:00 |
|
Devine Lu Linvega
|
986a1b47dd
|
Only get reg id once
|
2024-04-24 11:20:34 -07:00 |
|
Devine Lu Linvega
|
3136ae834f
|
Walk over incompiled registers
|
2024-04-24 11:18:06 -07:00 |
|
Devine Lu Linvega
|
4535c11017
|
Limit matches queries
|
2024-04-24 11:12:57 -07:00 |
|
Devine Lu Linvega
|
c63021cf03
|
Houeskeeping
|
2024-04-24 10:39:14 -07:00 |
|
Devine Lu Linvega
|
b866c69776
|
Compile rules
|
2024-04-24 10:31:46 -07:00 |
|
Devine Lu Linvega
|
c73b9f0ad7
|
Housekeeping
|
2024-04-23 20:20:31 -07:00 |
|
Devine Lu Linvega
|
8bb661ced0
|
Converted regs array to stack
|
2024-04-23 19:36:49 -07:00 |
|
Devine Lu Linvega
|
3c85bbd3b8
|
Exploding empty list -> identity
|
2024-04-23 13:51:25 -07:00 |
|
Devine Lu Linvega
|
a111783887
|
Fixed bug with counting parens
|
2024-04-23 09:35:58 -07:00 |
|
Devine Lu Linvega
|
95d8bf3d8e
|
Special registers that are non-emitting should erase themselves
|
2024-04-22 21:37:40 -07:00 |
|
Devine Lu Linvega
|
157d1909ea
|
Added comments
|
2024-04-22 20:50:39 -07:00 |
|
Devine Lu Linvega
|
91150500dd
|
Removed unecessary assign
|
2024-04-22 20:32:42 -07:00 |
|
Devine Lu Linvega
|
b67cf12f60
|
Use switch case for special registers
|
2024-04-22 20:22:54 -07:00 |
|
Devine Lu Linvega
|
f7e0e74888
|
Moved lambda from rules[0] to its own memory
|
2024-04-22 20:15:33 -07:00 |
|
Devine Lu Linvega
|
701d2c43a5
|
Do not continue after lambda rewrite
|
2024-04-22 20:13:19 -07:00 |
|
Devine Lu Linvega
|
ba48cfffa6
|
Rewind
|
2024-04-22 20:08:29 -07:00 |
|
Devine Lu Linvega
|
9c95b4567b
|
Return lambda to its own memory
|
2024-04-22 18:02:27 -07:00 |
|
Devine Lu Linvega
|
7a27c2ca5b
|
Housekeeping
|
2024-04-22 17:54:17 -07:00 |
|
Devine Lu Linvega
|
9b034eac95
|
Merged all regs needing functions
|
2024-04-22 17:43:35 -07:00 |
|
Devine Lu Linvega
|
4fce0e83e5
|
Abstracted match/write rule
|
2024-04-22 17:39:39 -07:00 |
|
Devine Lu Linvega
|
8e7bbb51d7
|
Store lambda in rules[0]
|
2024-04-22 17:27:34 -07:00 |
|
Devine Lu Linvega
|
e153eb797b
|
Print unused rules
|
2024-04-22 15:29:54 -07:00 |
|
Devine Lu Linvega
|
6fb9f96b0c
|
Oups
|
2024-04-22 10:10:55 -07:00 |
|
Devine Lu Linvega
|
aa0cc80455
|
Inlined set_reg
|
2024-04-22 09:54:41 -07:00 |
|
Devine Lu Linvega
|
ed5c0763e2
|
Warn on imbalance
|
2024-04-21 09:46:53 -07:00 |
|
Devine Lu Linvega
|
05e620bac5
|
Inlined create_rule
|
2024-04-21 09:24:05 -07:00 |
|
Devine Lu Linvega
|
73e9ebcfdd
|
Only check for register value once
|
2024-04-21 09:13:30 -07:00 |
|
Devine Lu Linvega
|
7a124eb70f
|
Do not pass last to write_rule
|
2024-04-20 22:31:58 -07:00 |
|
Devine Lu Linvega
|
222c7f6f4c
|
Blacklist ?) register
|
2024-04-20 21:50:56 -07:00 |
|
Devine Lu Linvega
|
4322d96ee2
|
Improved native substring capabilities
|
2024-04-20 18:56:04 -07:00 |
|
Devine Lu Linvega
|
529777fcb4
|
Can merge token during reg writing
|
2024-04-20 12:06:32 -07:00 |
|
Devine Lu Linvega
|
9029c64c77
|
A register is surrounded by spacers
|
2024-04-20 12:00:25 -07:00 |
|
Devine Lu Linvega
|
b725a608da
|
Escape question marks
|
2024-04-20 11:26:57 -07:00 |
|
Devine Lu Linvega
|
f139f3218e
|
Do not injest register on empty put_reg
|
2024-04-20 11:09:43 -07:00 |
|
Devine Lu Linvega
|
6a61088a70
|
Use cached data in register
|
2024-04-20 11:01:20 -07:00 |
|
Devine Lu Linvega
|
0e6e963425
|
Fixed issue with matching tokens of different length
|
2024-04-19 14:08:18 -07:00 |
|
Devine Lu Linvega
|
f35eb2c8ec
|
Added quiet/infinite flags
|
2024-04-18 11:33:23 -07:00 |
|
Devine Lu Linvega
|
7a93de35ad
|
Fixes issue with trailing ws
|
2024-04-17 11:40:47 -07:00 |
|
Devine Lu Linvega
|
88649fce12
|
Fixes whitespace bug
|
2024-04-17 11:18:37 -07:00 |
|
Devine Lu Linvega
|
6e0d3bb9e0
|
New explode/join registers
|
2024-04-17 10:35:40 -07:00 |
|
Devine Lu Linvega
|
3bce3dab79
|
Added align register
|
2024-04-17 09:17:31 -07:00 |
|
Devine Lu Linvega
|
9dd3439986
|
Added unpack register
|
2024-04-17 08:47:39 -07:00 |
|
Devine Lu Linvega
|
2449bac4ad
|
Faster register clear
|
2024-04-16 14:45:56 -07:00 |
|
Devine Lu Linvega
|
8df2a496cc
|
Reduce register clearing tasks
|
2024-04-16 13:51:34 -07:00 |
|
Devine Lu Linvega
|
acb655ad10
|
Use character in variable
|
2024-04-16 12:24:57 -07:00 |
|
Devine Lu Linvega
|
1fdda010eb
|
Fixed issue with > as first character
|
2024-04-16 08:24:55 -07:00 |