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primes bug fixes

This commit is contained in:
~d6 2022-01-03 00:31:29 -05:00
parent ff6c2544d9
commit d5951e0a53
1 changed files with 15 additions and 11 deletions
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26
primes32.tal
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@ -7,16 +7,15 @@
( 2. Check if x is even (not prime) )
( 3. Starting with i=3, we see if x%i is 0 )
( a. We increment i by 2 to avoid even i )
( b. We stop when x < i*i )
( b. We stop when x < i*i or i=0xffff )
( 4. If we didn't find an i, x is prime. )
( )
( This method can be fast for some large composite )
( numbers but is quite slow for large primes. )
( numbers but is slower for large primes. )
( )
( On my machine, 0x7fffffff was determined to be prime )
( in 0.5 seconds, but 0xfffffffb ran for 7 minutes )
( without finishing. Both are prime. By contrast )
( 0xffffffff was found be composite in 0.02 seconds. )
( On my machine, checking 0x7fffffff took 0.5 seconds )
( and checking 0xfffffffb took 0.9 seconds. Both are )
( prime numbers. )
( )
( Smaller primes also run fairly quickly: 0x17b5d was )
( determined to be prime in 0.02 seconds. )
@ -30,7 +29,7 @@
|0100
( number to check comes first )
#7fff #ffff
#fffe #0001
OVR2 OVR2 ;is-prime32 JSR2 ( test for primality )
STH ;emit-long JSR2 SPACE STHr EMIT-BYTE NEWLINE ( output )
#00 DIV #00 ( exit with /0 to make timing easier )
@ -43,21 +42,26 @@
( works for x >= 2 )
@is-prime32 ( x** -> bool^ )
,&x1 STR2 ,&x0 STR2 ,&x0 LDR2 ,&x1 LDR2 ( store and reload x )
DUP4 LIT2 &two0 0000 LIT2 &two1 0002 ;ne32 JSR2 ( x is 2? )
DUP4 #0000 LIT2 &two 0002 ;ne32 JSR2 ( x is 2? )
,&not-two JCN POP4 #01 JMP2r ( 2 is prime )
&not-two DUP #01 AND ( x x&1 )
,&not-even JCN POP4 #00 JMP2r ( x is even: not prime )
&not-even #0000 ,&i0 STR2 #0003 ,&i1 STR2 ( x i<-3 )
&not-even DUP4 #0000 #0003 ;ne32 JSR2 ( x is 3? )
,&not-three JCN POP4 #01 JMP2r ( 3 is prime )
&not-three #0000 ,&i0 STR2 #0005 ,&i1 STR2 ( x i<-5 )
,&two LDR2 ,&inc STR2
,&i0 LDR2 ,&i1 LDR2 ( load our candidate, i )
,&loop JMP ( jump over register data to loop label )
[ &i0 0000 &i1 0000 &x0 0000 &x1 0000 ] ( registers )
[ &i0 0000 &i1 0000 &x0 0000 &x1 0000 &inc 0000 &mask 0006 ] ( registers )
&loop ( x i )
,&x0 LDR2 ,&x1 LDR2 ,&i0 LDR2 ,&i1 LDR2 ( x i x i )
DUP4 ;mul32 JSR2 ;lt32 JSR2 ( x i x<i*i )
STH DUP2 #ffff EQU2 STHr ORA ( x i x<i*i||i=0xffff )
,&finished JCN ( x i )
,&x0 LDR2 ,&x1 LDR2 ,&i0 LDR2 ,&i1 LDR2 ( x i x i )
;mod32 JSR2 ;is-zero32 JSR2 ( x i x//i^ )
STH ,&two0 LDR2 ,&two1 LDR2 ;add32 JSR2 ( x i+2 )
STH #0000 ,&inc LDR2 ;add32 JSR2 ( x i+2 )
,&inc LDR2 ,&mask LDR2 EOR2 ,&inc STR2 ( inc<-inc^6 )
,&i1 STR2 ,&i0 STR2 ,&i0 LDR2 ,&i1 LDR2 ( write i+2 to register )
STHr ( x i+2 x//i^ )
,&i-divides-x JCN ( x j )