2022-03-26 21:32:46 -04:00
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#include "uxn.h"
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/*
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2024-07-01 20:42:36 -04:00
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Copyright (u) 2022-2024 Devine Lu Linvega, Andrew Alderwick, Andrew Richards
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2022-03-26 21:32:46 -04:00
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Permission to use, copy, modify, and distribute this software for any
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purpose with or without fee is hereby granted, provided that the above
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copyright notice and this permission notice appear in all copies.
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THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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WITH REGARD TO THIS SOFTWARE.
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*/
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2024-08-12 10:41:22 -04:00
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#define OPC(opc, init, body) {\
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2024-08-13 14:04:04 -04:00
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case 0x00|opc: {enum{_2=0,_r=0};init;body;} break;\
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case 0x20|opc: {enum{_2=1,_r=0};init;body;} break;\
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case 0x40|opc: {enum{_2=0,_r=1};init;body;} break;\
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case 0x60|opc: {enum{_2=1,_r=1};init;body;} break;\
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case 0x80|opc: {enum{_2=0,_r=0};k=uxn.wst.ptr;init;uxn.wst.ptr= k;body;} break;\
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case 0xa0|opc: {enum{_2=1,_r=0};k=uxn.wst.ptr;init;uxn.wst.ptr= k;body;} break;\
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case 0xc0|opc: {enum{_2=0,_r=1};k=uxn.rst.ptr;init;uxn.rst.ptr= k;body;} break;\
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case 0xe0|opc: {enum{_2=1,_r=1};k=uxn.rst.ptr;init;uxn.rst.ptr= k;body;} break;\
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2024-07-02 13:44:14 -04:00
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}
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2024-08-05 17:02:02 -04:00
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/* Microcode */
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2024-08-17 14:03:11 -04:00
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#define REM if(_r) uxn.rst.ptr -= 1 + _2; else uxn.wst.ptr -= 1 + _2;
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2024-08-17 12:49:09 -04:00
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#define JMI pc += uxn.ram[pc++] << 8 | uxn.ram[pc++];
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#define JMP(j) if(_2) pc = (j); else pc += (Sint8)(j);
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2024-08-12 12:33:47 -04:00
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#define INC(s) uxn.s.dat[uxn.s.ptr++]
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#define DEC(s) uxn.s.dat[--uxn.s.ptr]
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2024-08-13 14:04:04 -04:00
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#define POx(o) if(_2) { PO2(o) } else PO1(o)
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#define PO2(o) if(_r) o = DEC(rst) | (DEC(rst) << 8); else o = DEC(wst) | (DEC(wst) << 8);
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#define PO1(o) if(_r) o = DEC(rst); else o = DEC(wst);
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#define PUx(y) if(_2) { PU2(y) } else PU1(y)
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#define PU2(y) tt = (y); PU1(tt >> 8) PU1(tt)
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#define PU1(y) if(_r) INC(rst) = y; else INC(wst) = y;
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2024-08-17 13:23:37 -04:00
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#define PUR(y) if(_r) INC(wst) = y; else INC(rst) = y;
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#define GET(o,p) if(_2) PO1(p) PO1(o)
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#define PUT(y,z) PU1(y) if(_2) PU1(z)
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2024-08-17 13:23:37 -04:00
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#define DEI(i,o,p) o =emu_dei(i); if(_2) p =emu_dei(i + 1);
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#define DEO(i,y,z) emu_deo(i, y); if(_2) emu_deo(i + 1, z);
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#define PEK(i,o,p,r) o = uxn.ram[i]; if(_2) r = i + 1, p = uxn.ram[r];
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#define POK(i,y,z,r) uxn.ram[i] = y; if(_2) r = i + 1, uxn.ram[r] = z;
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2024-08-16 23:13:41 -04:00
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2022-03-26 21:32:46 -04:00
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int
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2024-06-29 15:35:34 -04:00
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uxn_eval(Uint16 pc)
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{
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int a,b,c,d,e,f,k;
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2024-08-12 10:50:57 -04:00
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Uint8 t;
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2024-08-05 18:06:05 -04:00
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Uint16 tt;
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2024-06-29 15:38:41 -04:00
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if(!pc || uxn.dev[0x0f]) return 0;
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2023-01-12 12:34:45 -05:00
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for(;;) {
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2024-07-02 13:44:14 -04:00
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switch(uxn.ram[pc++]) {
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2024-07-02 00:00:24 -04:00
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/* BRK */ case 0x00: return 1;
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/* JCI */ case 0x20: if(DEC(wst)) { JMI break; } pc += 2; break;
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2024-07-02 00:31:09 -04:00
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/* JMI */ case 0x40: JMI break;
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/* JSI */ case 0x60: tt = pc + 2; INC(rst) = tt >> 8; INC(rst) = tt; JMI break;
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/* LI2 */ case 0xa0: INC(wst) = uxn.ram[pc++];
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/* LIT */ case 0x80: INC(wst) = uxn.ram[pc++]; break;
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/* L2r */ case 0xe0: INC(rst) = uxn.ram[pc++];
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/* LIr */ case 0xc0: INC(rst) = uxn.ram[pc++]; break;
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2024-08-16 22:33:23 -04:00
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/* INC */ OPC(0x01, POx(a),PUx(a + 1))
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2024-08-17 14:03:11 -04:00
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/* POP */ OPC(0x02, REM,0)
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/* NIP */ OPC(0x03, GET(a,b) REM,PUT(a,b))
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/* SWP */ OPC(0x04, GET(a,b) GET(c,d),PUT(a,b) PUT(c,d))
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/* ROT */ OPC(0x05, GET(a,b) GET(c,d) GET(e,f),PUT(c,d) PUT(a,b) PUT(e,f))
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/* DUP */ OPC(0x06, GET(a,b),PUT(a,b) PUT(a,b))
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/* OVR */ OPC(0x07, GET(a,b) GET(c,d),PUT(c,d) PUT(a,b) PUT(c,d))
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2024-08-16 22:33:23 -04:00
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/* EQU */ OPC(0x08, POx(a) POx(b),PU1(b == a))
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/* NEQ */ OPC(0x09, POx(a) POx(b),PU1(b != a))
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/* GTH */ OPC(0x0a, POx(a) POx(b),PU1(b > a))
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/* LTH */ OPC(0x0b, POx(a) POx(b),PU1(b < a))
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/* JMP */ OPC(0x0c, POx(a),JMP(a))
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2024-08-12 10:41:22 -04:00
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/* JCN */ OPC(0x0d, POx(a) PO1(b), if(b) JMP(a))
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2024-08-17 13:23:37 -04:00
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/* JSR */ OPC(0x0e, POx(a),PUR(pc >> 8) PUR(pc) JMP(a))
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/* STH */ OPC(0x0f, GET(a,b),PUR(a) if(_2) PUR(b))
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2024-08-17 12:49:09 -04:00
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/* LDZ */ OPC(0x10, PO1(a),PEK(a,b,c,t) PUT(b,c))
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/* STZ */ OPC(0x11, PO1(a) GET(b,c),POK(a,b,c,t))
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/* LDR */ OPC(0x12, PO1(a),PEK(pc+(Sint8)a,b,c,tt) PUT(b,c))
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/* STR */ OPC(0x13, PO1(a) GET(b,c),POK(pc+(Sint8)a,b,c,tt))
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/* LDA */ OPC(0x14, PO2(a),PEK(a,b,c,tt) PUT(b,c))
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/* STA */ OPC(0x15, PO2(a) GET(b,c),POK(a,b,c,tt))
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/* DEI */ OPC(0x16, PO1(a),DEI(a,b,c) PUT(b,c))
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/* DEO */ OPC(0x17, PO1(a) GET(b,c),DEO(a,b,c))
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2024-08-16 22:33:23 -04:00
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/* ADD */ OPC(0x18, POx(a) POx(b),PUx(b + a))
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/* SUB */ OPC(0x19, POx(a) POx(b),PUx(b - a))
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/* MUL */ OPC(0x1a, POx(a) POx(b),PUx(b * a))
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/* DIV */ OPC(0x1b, POx(a) POx(b),PUx(a ? b / a : 0))
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/* AND */ OPC(0x1c, POx(a) POx(b),PUx(b & a))
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/* ORA */ OPC(0x1d, POx(a) POx(b),PUx(b | a))
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/* EOR */ OPC(0x1e, POx(a) POx(b),PUx(b ^ a))
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/* SFT */ OPC(0x1f, PO1(a) POx(b),PUx(b >> (a & 0xf) << (a >> 4)))
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2024-07-01 20:42:36 -04:00
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}
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2023-04-10 15:29:26 -04:00
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}
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2022-03-26 21:32:46 -04:00
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}
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