Commit Graph

95 Commits

Author SHA1 Message Date
Devine Lu Linvega a277ae1142 Microcode that copies bytes in short without merging them 2024-08-16 20:13:41 -07:00
Devine Lu Linvega bffb31ccc8 Formatting 2024-08-16 19:33:23 -07:00
Devine Lu Linvega 4eac8853d6 (uxn.c)Removed scopes around macros 2024-08-13 11:04:04 -07:00
Devine Lu Linvega d27602d98a (uxn.c) Removed IMM macro for INC/DEC 2024-08-12 09:33:47 -07:00
Devine Lu Linvega 7b1e7b65fd (uxn.c) Do not set ptr via pointer 2024-08-12 08:34:08 -07:00
Devine Lu Linvega 2f032854b7 (uxn.c) The k value does not need masking 2024-08-12 07:50:57 -07:00
Devine Lu Linvega f4d74dcd48 (uxn) Removed sp* indirection 2024-08-12 07:41:22 -07:00
Devine Lu Linvega 7849662ac8 Use enum for flags, like uxn32 2024-08-05 15:06:05 -07:00
Devine Lu Linvega 8eae101486 Tiny change to macro arg order 2024-08-05 14:02:02 -07:00
Devine Lu Linvega c3a54e415e Rolled back change to uxn core 2024-07-02 15:56:20 -08:00
Devine Lu Linvega c8b690921e (uxn.c) Housekeeping 2024-07-02 15:12:39 -08:00
Devine Lu Linvega 9af4cf2d05 (uxn.c) Let LITs fall through 2024-07-02 11:47:56 -08:00
Devine Lu Linvega 44c5e17aa2 (uxn.c) Housekeeping 2024-07-02 09:44:14 -08:00
Devine Lu Linvega 419ff65d83 (uxn.c) Housekeeping 2024-07-01 20:31:09 -08:00
Devine Lu Linvega a3d0fc88ce Unroll core 2024-07-01 20:00:24 -08:00
Devine Lu Linvega 8be4980fe3 Faster IMM opcodes 2024-07-01 17:04:09 -08:00
Devine Lu Linvega 72994b6d50 Use abc core 2024-07-01 16:42:36 -08:00
Devine Lu Linvega 3276f03ffe (uxn.c) Use small registers for SWP/DUP 2024-07-01 13:21:31 -08:00
Devine Lu Linvega 3b880b83cf (uxn.c) Remove T2_ macro for non-modifying transformations 2024-07-01 13:15:17 -08:00
Devine Lu Linvega 576d9b6b89 Removed unused macro 2024-06-30 20:28:35 -08:00
Devine Lu Linvega 2b06a5169d Ignore r mode in imm opcodes 2024-06-30 20:16:54 -08:00
Devine Lu Linvega d3ea48e759 Faster JSI opcode 2024-06-30 19:54:12 -08:00
Devine Lu Linvega e379cfa2ad Faster imm opcodes 2024-06-30 17:45:25 -08:00
Devine Lu Linvega 7cff7b19d1 Removed indirection in uxn_eval 2024-06-29 11:38:41 -08:00
Devine Lu Linvega cfc8349d54 Removed indirection in uxn_eval call 2024-06-29 11:35:34 -08:00
Devine Lu Linvega eff62461a4 Removing uxn core indirection in dei deo 2024-06-29 10:51:12 -08:00
Devine Lu Linvega 83762ded9c Use faster core 2024-01-15 10:05:45 -08:00
Devine Lu Linvega e247b86471 Improved core 2024-01-10 17:26:29 -08:00
neauoire d53473175c (uxn.c) tighter switch 2023-11-09 14:25:12 -08:00
neauoire 91257363c2 (uxn.c) Simple branching value 2023-11-01 16:30:42 -07:00
neauoire 21dfea7890 (uxn.c) Cleanup 2023-11-01 12:00:34 -07:00
neauoire c29c480e92 Removed unused variable 2023-11-01 11:12:57 -07:00
neauoire 6b9717276d (uxn.c) Wrapping zp 2023-11-01 11:10:29 -07:00
neauoire 8f38d8bde2 (uxn.c) Wrap RAM 2023-11-01 10:57:12 -07:00
neauoire 4d3974faad Redesigned the stack debugger 2023-10-31 10:59:42 -07:00
neauoire 90c3a25792 emu_deo() writes in memory 2023-10-31 09:00:02 -07:00
neauoire f63b25e118 (screen.c) Fixed missing pixel in redraw region 2023-09-02 18:47:33 -07:00
neauoire 5e720d7e4b Uxn can no longer error 2023-09-02 14:03:21 -07:00
neauoire 0fd7427d37 Only check for keep mode during SET() 2023-09-01 15:56:47 -07:00
neauoire 74c830c44c (uxn.c) Use faster core 2023-08-30 12:14:32 -07:00
neauoire c97d19da99 (uxn.c) Catch JCI underflow 2023-08-30 09:14:20 -07:00
neauoire abfeead04c Cache input in PUT2 macros 2023-08-30 08:57:41 -07:00
neauoire bd5a5cbda2 (uxn.c) Added macros for multi-write 2023-08-29 10:47:49 -07:00
neauoire 54b136bfea (uxn.c) Simpler opc form 2023-08-29 09:47:53 -07:00
neauoire 71490d712c (uxn.c) Removed needed masking for opcode lookup 2023-08-29 09:42:06 -07:00
neauoire cdb0f0e4a4 (uxn.c) Removed unnecessary negation 2023-08-25 13:06:00 -07:00
neauoire e1b2f8f14b Tightened screen debugger redraw 2023-08-16 14:31:40 -07:00
neauoire 7dac87dcba Standardized varvara boot 2023-08-16 13:10:42 -07:00
neauoire 86c26de680 Use tnl core 2023-08-09 19:50:29 -07:00
neauoire 2ed94d4c28 (uxn.c) merged POP-POP PUSH-PUSH sequences 2023-08-08 20:07:27 -07:00