Added logic operators to ALU
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0a1b6bfb5c
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@ -47,8 +47,8 @@ device_write(char *s)
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char c = *s, *cap = walk(s), **reg = regs + '0';
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char c = *s, *cap = walk(s), **reg = regs + '0';
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/* phase: ALU */
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/* phase: ALU */
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if(*reg) {
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if(*reg) {
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switch(c) {
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/* clang-format off */
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/* clang-format off */
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switch(c) {
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case '+': for(acc = sint(*reg++); *reg != 0; reg++) acc += sint(*reg); break;
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case '+': for(acc = sint(*reg++); *reg != 0; reg++) acc += sint(*reg); break;
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case '-': for(acc = sint(*reg++); *reg != 0; reg++) acc -= sint(*reg); break;
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case '-': for(acc = sint(*reg++); *reg != 0; reg++) acc -= sint(*reg); break;
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case '*': for(acc = sint(*reg++); *reg != 0; reg++) acc *= sint(*reg); break;
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case '*': for(acc = sint(*reg++); *reg != 0; reg++) acc *= sint(*reg); break;
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@ -57,8 +57,12 @@ device_write(char *s)
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case '&': for(acc = sint(*reg++); *reg != 0; reg++) acc &= sint(*reg); break;
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case '&': for(acc = sint(*reg++); *reg != 0; reg++) acc &= sint(*reg); break;
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case '^': for(acc = sint(*reg++); *reg != 0; reg++) acc ^= sint(*reg); break;
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case '^': for(acc = sint(*reg++); *reg != 0; reg++) acc ^= sint(*reg); break;
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case '|': for(acc = sint(*reg++); *reg != 0; reg++) acc |= sint(*reg); break;
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case '|': for(acc = sint(*reg++); *reg != 0; reg++) acc |= sint(*reg); break;
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/* clang-format on */
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case '=': for(acc = sint(*reg++); *reg != 0; reg++) acc = acc == sint(*reg); break;
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case '!': for(acc = sint(*reg++); *reg != 0; reg++) acc = acc != sint(*reg); break;
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case '>': for(acc = sint(*reg++); *reg != 0; reg++) acc = acc > sint(*reg); break;
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case '<': for(acc = sint(*reg++); *reg != 0; reg++) acc = acc < sint(*reg); break;
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}
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}
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/* clang-format on */
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dst_ += snprintf(dst_, 0x10, "%d", acc);
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dst_ += snprintf(dst_, 0x10, "%d", acc);
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return;
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return;
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}
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}
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