Commit Graph

177 Commits

Author SHA1 Message Date
Devine Lu Linvega f7e0e74888 Moved lambda from rules[0] to its own memory 2024-04-22 20:15:33 -07:00
Devine Lu Linvega 701d2c43a5 Do not continue after lambda rewrite 2024-04-22 20:13:19 -07:00
Devine Lu Linvega ba48cfffa6 Rewind 2024-04-22 20:08:29 -07:00
Devine Lu Linvega 9c95b4567b Return lambda to its own memory 2024-04-22 18:02:27 -07:00
Devine Lu Linvega 7a27c2ca5b Housekeeping 2024-04-22 17:54:17 -07:00
Devine Lu Linvega 9b034eac95 Merged all regs needing functions 2024-04-22 17:43:35 -07:00
Devine Lu Linvega 4fce0e83e5 Abstracted match/write rule 2024-04-22 17:39:39 -07:00
Devine Lu Linvega 8e7bbb51d7 Store lambda in rules[0] 2024-04-22 17:27:34 -07:00
Devine Lu Linvega e153eb797b Print unused rules 2024-04-22 15:29:54 -07:00
Devine Lu Linvega 6fb9f96b0c Oups 2024-04-22 10:10:55 -07:00
Devine Lu Linvega aa0cc80455 Inlined set_reg 2024-04-22 09:54:41 -07:00
Devine Lu Linvega ed5c0763e2 Warn on imbalance 2024-04-21 09:46:53 -07:00
Devine Lu Linvega 05e620bac5 Inlined create_rule 2024-04-21 09:24:05 -07:00
Devine Lu Linvega 73e9ebcfdd Only check for register value once 2024-04-21 09:13:30 -07:00
Devine Lu Linvega 7a124eb70f Do not pass last to write_rule 2024-04-20 22:31:58 -07:00
Devine Lu Linvega 222c7f6f4c Blacklist ?) register 2024-04-20 21:50:56 -07:00
Devine Lu Linvega 4322d96ee2 Improved native substring capabilities 2024-04-20 18:56:04 -07:00
Devine Lu Linvega 529777fcb4 Can merge token during reg writing 2024-04-20 12:06:32 -07:00
Devine Lu Linvega 9029c64c77 A register is surrounded by spacers 2024-04-20 12:00:25 -07:00
Devine Lu Linvega b725a608da Escape question marks 2024-04-20 11:26:57 -07:00
Devine Lu Linvega f139f3218e Do not injest register on empty put_reg 2024-04-20 11:09:43 -07:00
Devine Lu Linvega 6a61088a70 Use cached data in register 2024-04-20 11:01:20 -07:00
Devine Lu Linvega 0e6e963425 Fixed issue with matching tokens of different length 2024-04-19 14:08:18 -07:00
Devine Lu Linvega f35eb2c8ec Added quiet/infinite flags 2024-04-18 11:33:23 -07:00
Devine Lu Linvega 7a93de35ad Fixes issue with trailing ws 2024-04-17 11:40:47 -07:00
Devine Lu Linvega 88649fce12 Fixes whitespace bug 2024-04-17 11:18:37 -07:00
Devine Lu Linvega 6e0d3bb9e0 New explode/join registers 2024-04-17 10:35:40 -07:00
Devine Lu Linvega 3bce3dab79 Added align register 2024-04-17 09:17:31 -07:00
Devine Lu Linvega 9dd3439986 Added unpack register 2024-04-17 08:47:39 -07:00
Devine Lu Linvega 2449bac4ad Faster register clear 2024-04-16 14:45:56 -07:00
Devine Lu Linvega 8df2a496cc Reduce register clearing tasks 2024-04-16 13:51:34 -07:00
Devine Lu Linvega acb655ad10 Use character in variable 2024-04-16 12:24:57 -07:00
Devine Lu Linvega 1fdda010eb Fixed issue with > as first character 2024-04-16 08:24:55 -07:00
Devine Lu Linvega 205cd340b5 Improved examples 2024-04-15 16:26:25 -07:00
Devine Lu Linvega 60325b23a3 Fixed issue with unwrapping rues 2024-04-15 15:58:38 -07:00
Devine Lu Linvega 0012004ee5 Fixed issue with cycles count 2024-04-15 12:08:27 -07:00
Devine Lu Linvega 966304f09a Halt after a number of rewrites 2024-04-15 08:47:20 -07:00
Devine Lu Linvega 8d661163af Housekeeping 2024-04-14 19:39:31 -07:00
Devine Lu Linvega 4205cc8792 Use stored pointer for src_ 2024-04-14 19:36:16 -07:00
Devine Lu Linvega 8705ebebc6 Fixed issue with ?~ register 2024-04-14 17:41:22 -07:00
Devine Lu Linvega b5b6472ebc ?~ register now takes in an argument 2024-04-14 17:33:42 -07:00
Devine Lu Linvega dacb9836a0 Fixed issue with trailing whitespace 2024-04-14 16:58:26 -07:00
Devine Lu Linvega 8ccb19d897 Removed padding of curlies and square brackets 2024-04-13 19:28:39 -07:00
Devine Lu Linvega cbfa3be00d Updated date 2024-04-13 16:25:55 -07:00
Devine Lu Linvega 7e7e455b03 Attempt at spacing out special characters 2024-04-13 16:25:19 -07:00
Devine Lu Linvega 42fd486a41 Do not walk twice for explode 2024-04-13 16:22:37 -07:00
Devine Lu Linvega 70e96e9644 Added comments for special registers 2024-04-13 16:16:47 -07:00
Devine Lu Linvega e897e59f7a Fixed issue with empty plode register 2024-04-13 16:12:55 -07:00
Devine Lu Linvega fed55d58b3 Added missing rune in empty register writing 2024-04-12 14:35:29 -07:00
Devine Lu Linvega ea9935babb Allow for empty right-hand side rules 2024-04-12 10:30:59 -07:00