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  • 7e9eab04fc Improved REPL Devine Lu Linvega 2024-04-25 18:53:22 -0700
  • eaa1f92347 Do not pass regs through funciton Devine Lu Linvega 2024-04-25 18:39:17 -0700
  • 47b80e126e Write EOF token via ?~ register Devine Lu Linvega 2024-04-25 18:36:45 -0700
  • 88b5c527f4 Beta 2 Devine Lu Linvega 2024-04-25 12:17:31 -0700
  • f28444f60e Isolated rule finding Devine Lu Linvega 2024-04-25 11:08:14 -0700
  • 8cb22a9966 Completed split from match and apply Devine Lu Linvega 2024-04-25 10:32:39 -0700
  • 6d10bb3b66 Split apply_rule Devine Lu Linvega 2024-04-25 10:12:43 -0700
  • d8325fabcc Removed extra check from apply_rule Devine Lu Linvega 2024-04-25 09:48:24 -0700
  • 97f8cf03ac Beta Devine Lu Linvega 2024-04-24 20:26:56 -0700
  • 56bb5969ab Added comments Devine Lu Linvega 2024-04-24 15:55:48 -0700
  • bd6a194e24 Clean only required registers Devine Lu Linvega 2024-04-24 15:46:27 -0700
  • 5ab8e10a6b Housekeeping Devine Lu Linvega 2024-04-24 15:34:11 -0700
  • 399ac8dd17 Do no allocate empty cells in dict Devine Lu Linvega 2024-04-24 15:17:57 -0700
  • ca76fdd9c3 Removed temporary pointers Devine Lu Linvega 2024-04-24 15:08:09 -0700
  • 3f5e099051 Merged right hand side of compiler Devine Lu Linvega 2024-04-24 15:01:47 -0700
  • 3dbb23319e Break out of compilation early Devine Lu Linvega 2024-04-24 14:54:40 -0700
  • dfe9b076dc Merged rule compilation for left side Devine Lu Linvega 2024-04-24 14:31:17 -0700
  • 97d406c3a8 Progress on rules compilation Devine Lu Linvega 2024-04-24 14:22:23 -0700
  • 53ef87a4b9 Inlined parse_frag Devine Lu Linvega 2024-04-24 14:03:14 -0700
  • 9d4d20e542 Housekeeping Devine Lu Linvega 2024-04-24 13:49:21 -0700
  • bcbfe02783 Progress in merging parsers Devine Lu Linvega 2024-04-24 13:45:08 -0700
  • 23ec4856e0 Road to merging frag parsing and rule compilation Devine Lu Linvega 2024-04-24 13:41:09 -0700
  • 76fe5830be Abstracted reg lookup Devine Lu Linvega 2024-04-24 13:35:12 -0700
  • 986a1b47dd Only get reg id once Devine Lu Linvega 2024-04-24 11:20:34 -0700
  • 3136ae834f Walk over incompiled registers Devine Lu Linvega 2024-04-24 11:18:06 -0700
  • 4535c11017 Limit matches queries Devine Lu Linvega 2024-04-24 11:12:57 -0700
  • c63021cf03 Houeskeeping Devine Lu Linvega 2024-04-24 10:39:14 -0700
  • b866c69776 Compile rules Devine Lu Linvega 2024-04-24 10:31:46 -0700
  • c73b9f0ad7 Housekeeping Devine Lu Linvega 2024-04-23 20:20:31 -0700
  • 8bb661ced0 Converted regs array to stack Devine Lu Linvega 2024-04-23 19:36:49 -0700
  • f18adb503d Replace io_repl.modal with an actual Modal REPL Sebastian LaVine 2024-04-23 17:07:28 -0400
  • 3c85bbd3b8 Exploding empty list -> identity Devine Lu Linvega 2024-04-23 13:51:25 -0700
  • 14ce4eb176 Added tests Devine Lu Linvega 2024-04-23 13:45:03 -0700
  • c7aad6e21e New tests Devine Lu Linvega 2024-04-23 13:29:30 -0700
  • 083538ada8 Some tests are failing, but nothing to worry about for now Devine Lu Linvega 2024-04-23 10:29:51 -0700
  • a111783887 Fixed bug with counting parens Devine Lu Linvega 2024-04-23 09:35:58 -0700
  • 1ed120f569 Added more whitespace tests Devine Lu Linvega 2024-04-23 08:37:40 -0700
  • bb58d295fd Added tests for whitespace Devine Lu Linvega 2024-04-23 08:21:35 -0700
  • 95d8bf3d8e Special registers that are non-emitting should erase themselves Devine Lu Linvega 2024-04-22 21:37:40 -0700
  • 157d1909ea Added comments Devine Lu Linvega 2024-04-22 20:50:39 -0700
  • 91150500dd Removed unecessary assign Devine Lu Linvega 2024-04-22 20:32:42 -0700
  • b67cf12f60 Use switch case for special registers Devine Lu Linvega 2024-04-22 20:22:54 -0700
  • f7e0e74888 Moved lambda from rules[0] to its own memory Devine Lu Linvega 2024-04-22 20:15:33 -0700
  • 701d2c43a5 Do not continue after lambda rewrite Devine Lu Linvega 2024-04-22 20:13:19 -0700
  • ba48cfffa6 Rewind Devine Lu Linvega 2024-04-22 20:08:29 -0700
  • 9c95b4567b Return lambda to its own memory Devine Lu Linvega 2024-04-22 18:02:27 -0700
  • 7a27c2ca5b Housekeeping Devine Lu Linvega 2024-04-22 17:54:17 -0700
  • 9b034eac95 Merged all regs needing functions Devine Lu Linvega 2024-04-22 17:43:35 -0700
  • 4fce0e83e5 Abstracted match/write rule Devine Lu Linvega 2024-04-22 17:39:39 -0700
  • 8e7bbb51d7 Store lambda in rules[0] Devine Lu Linvega 2024-04-22 17:27:34 -0700
  • e153eb797b Print unused rules Devine Lu Linvega 2024-04-22 15:29:54 -0700
  • 6fb9f96b0c Oups Devine Lu Linvega 2024-04-22 10:10:55 -0700
  • aa0cc80455 Inlined set_reg Devine Lu Linvega 2024-04-22 09:54:41 -0700
  • 94d9ecfa72 Renamed shirt.modal to postcard.modal Devine Lu Linvega 2024-04-21 19:34:43 -0700
  • 150d0ff032 Improved init for sierpinski Devine Lu Linvega 2024-04-21 18:06:08 -0700
  • 0be295a237 Added sierpinski to examples/ Devine Lu Linvega 2024-04-21 16:47:27 -0700
  • ed5c0763e2 Warn on imbalance Devine Lu Linvega 2024-04-21 09:46:53 -0700
  • 111e143d2f Added tests Devine Lu Linvega 2024-04-21 09:43:00 -0700
  • 05e620bac5 Inlined create_rule Devine Lu Linvega 2024-04-21 09:24:05 -0700
  • 73e9ebcfdd Only check for register value once Devine Lu Linvega 2024-04-21 09:13:30 -0700
  • a2f60e12ff Removed old test Devine Lu Linvega 2024-04-20 22:34:28 -0700
  • 7a124eb70f Do not pass last to write_rule Devine Lu Linvega 2024-04-20 22:31:58 -0700
  • 222c7f6f4c Blacklist ?) register Devine Lu Linvega 2024-04-20 21:50:56 -0700
  • 4322d96ee2 Improved native substring capabilities Devine Lu Linvega 2024-04-20 18:56:04 -0700
  • 9295a4d2b4 Added tests Devine Lu Linvega 2024-04-20 12:38:05 -0700
  • 529777fcb4 Can merge token during reg writing Devine Lu Linvega 2024-04-20 12:06:32 -0700
  • 9029c64c77 A register is surrounded by spacers Devine Lu Linvega 2024-04-20 12:00:25 -0700
  • b725a608da Escape question marks Devine Lu Linvega 2024-04-20 11:26:57 -0700
  • f139f3218e Do not injest register on empty put_reg Devine Lu Linvega 2024-04-20 11:09:43 -0700
  • 6a61088a70 Use cached data in register Devine Lu Linvega 2024-04-20 11:01:20 -0700
  • 0e6e963425 Fixed issue with matching tokens of different length Devine Lu Linvega 2024-04-19 14:08:18 -0700
  • 6f89fb02bc Added postcard example Devine Lu Linvega 2024-04-19 11:10:37 -0700
  • bc3165d7e6 Added documentation for flags Devine Lu Linvega 2024-04-18 11:45:32 -0700
  • a80a5ab826 Merge remote-tracking branch 'upstream/master' into d6/binary ~d6 2024-04-18 14:35:36 -0400
  • f35eb2c8ec Added quiet/infinite flags Devine Lu Linvega 2024-04-18 11:33:23 -0700
  • 055829dc07 Merge remote-tracking branch 'origin/d6/binary' into d6/binary ~d6 2024-04-18 14:22:49 -0400
  • 36195fce6d Merge remote-tracking branch 'upstream/master' into d6/binary ~d6 2024-04-18 14:22:28 -0400
  • 85884df6a3 Add two new options for modal: ~d6 2024-04-18 14:07:44 -0400
  • 40ef57ebf5 Added fizzbuzz example Devine Lu Linvega 2024-04-18 11:00:08 -0700
  • 9ebbcf7d08 udpate to new ?^ register ~d6 2024-04-18 10:25:07 -0400
  • dcd8b283e5 Merge remote-tracking branch 'upstream/master' into d6/binary ~d6 2024-04-18 10:22:21 -0400
  • 21782ba7ba Added a test for self-erasing token Devine Lu Linvega 2024-04-17 11:49:32 -0700
  • 7a93de35ad Fixes issue with trailing ws Devine Lu Linvega 2024-04-17 11:40:47 -0700
  • 88649fce12 Fixes whitespace bug Devine Lu Linvega 2024-04-17 11:18:37 -0700
  • 44e809f092 Updated tests to match new registers Devine Lu Linvega 2024-04-17 10:56:51 -0700
  • 6e0d3bb9e0 New explode/join registers Devine Lu Linvega 2024-04-17 10:35:40 -0700
  • 3bce3dab79 Added align register Devine Lu Linvega 2024-04-17 09:17:31 -0700
  • 9dd3439986 Added unpack register Devine Lu Linvega 2024-04-17 08:47:39 -0700
  • ec48109bfe optimizations, ostr, hstr, etc ~d6 2024-04-16 23:53:36 -0400
  • ff919d23c8 Merge remote-tracking branch 'upstream/master' into d6/binary ~d6 2024-04-16 17:57:25 -0400
  • 2449bac4ad Faster register clear master Devine Lu Linvega 2024-04-16 14:45:56 -0700
  • cf4db4ae76 Merge remote-tracking branch 'upstream/master' into d6/binary ~d6 2024-04-16 17:25:53 -0400
  • 8df2a496cc Reduce register clearing tasks Devine Lu Linvega 2024-04-16 13:51:34 -0700
  • acb655ad10 Use character in variable Devine Lu Linvega 2024-04-16 12:24:57 -0700
  • 84de156184 Added string_join example Devine Lu Linvega 2024-04-16 12:17:11 -0700
  • 1fdda010eb Fixed issue with > as first character Devine Lu Linvega 2024-04-16 08:24:55 -0700
  • b61172d52e Added guarded test Devine Lu Linvega 2024-04-15 20:58:16 -0700
  • 10aa9c8e46 Expanded tests Devine Lu Linvega 2024-04-15 20:39:25 -0700
  • f25d35decf Expanded tests Devine Lu Linvega 2024-04-15 20:13:08 -0700
  • 45e0df792b Expanded tests Devine Lu Linvega 2024-04-15 19:47:11 -0700