uxn/examples/test.usm

( blank )

:dev/r fff8 ( std read port )
:dev/w fff9 ( std write port )

;x 1 ;y 2

|0100 @RESET

	#12 #34 WSR2
	RSW2
	,test JSR

BRK

@test
	RTS

|c000 @FRAME BRK 
|d000 @ERROR BRK 

|FFFA .RESET .FRAME .ERROR
Added helper for LDR/STR 2021-02-14 20:00:17 -05:00			`( blank )`
Progress on branching 2021-02-01 14:58:47 -05:00
Added helper for LDR/STR 2021-02-14 20:00:17 -05:00			`:dev/r fff8 ( std read port )`
			`:dev/w fff9 ( std write port )`
Started implementing signed operations 2021-02-12 19:18:52 -05:00
Added helper for LDR/STR 2021-02-14 20:00:17 -05:00			`;x 1 ;y 2`
Redesigned devices 2021-02-09 13:06:55 -05:00
Added helper for LDR/STR 2021-02-14 20:00:17 -05:00			`\|0100 @RESET`
Added controller example 2021-02-14 14:51:36 -05:00
Implemented WSR/RSW 2021-02-14 23:23:00 -05:00			`#12 #34 WSR2`
			`RSW2`
			`,test JSR`
Added chr/icn parser to PPU 2021-02-14 13:22:42 -05:00
Added controller example 2021-02-14 14:51:36 -05:00			`BRK`
Added chr/icn parser to PPU 2021-02-14 13:22:42 -05:00
Implemented WSR/RSW 2021-02-14 23:23:00 -05:00			`@test`
			`RTS`

Added helper for LDR/STR 2021-02-14 20:00:17 -05:00			`\|c000 @FRAME BRK`
Added experimental dev1 2021-02-05 14:57:37 -05:00			`\|d000 @ERROR BRK`
Rewrote hello world to not use the stack 2021-02-13 19:37:03 -05:00
Added experimental dev1 2021-02-05 14:57:37 -05:00			`\|FFFA .RESET .FRAME .ERROR`