Implemented WSR/RSW
This commit is contained in:
parent
92e455141f
commit
14cd9e03c4
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@ -35,8 +35,8 @@ Program p;
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char ops[][4] = {
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char ops[][4] = {
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"BRK", "NOP", "LIT", "---", "IOR", "IOW", "LDR", "STR",
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"BRK", "NOP", "LIT", "---", "IOR", "IOW", "LDR", "STR",
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"JMP", "JSR", "RTI", "RTS", "---", "---", "---", "---",
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"JMP", "JSR", "---", "RTS", "AND", "ORA", "ROL", "ROR",
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"POP", "DUP", "SWP", "OVR", "ROT", "AND", "ORA", "ROL",
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"POP", "DUP", "SWP", "OVR", "ROT", "WSR", "RSW", "---",
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"ADD", "SUB", "MUL", "DIV", "EQU", "NEQ", "GTH", "LTH"
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"ADD", "SUB", "MUL", "DIV", "EQU", "NEQ", "GTH", "LTH"
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};
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};
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2
build.sh
2
build.sh
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@ -24,5 +24,5 @@ rm -f ./bin/emulator
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cc -std=c89 -DDEBUG -Wall -Wno-unknown-pragmas -Wpedantic -Wshadow -Wextra -Werror=implicit-int -Werror=incompatible-pointer-types -Werror=int-conversion -Wvla -g -Og -fsanitize=address -fsanitize=undefined uxn.c emulator.c -L/usr/local/lib -lSDL2 -o bin/emulator
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cc -std=c89 -DDEBUG -Wall -Wno-unknown-pragmas -Wpedantic -Wshadow -Wextra -Werror=implicit-int -Werror=incompatible-pointer-types -Werror=int-conversion -Wvla -g -Og -fsanitize=address -fsanitize=undefined uxn.c emulator.c -L/usr/local/lib -lSDL2 -o bin/emulator
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# run
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# run
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./bin/assembler examples/sprite.usm bin/boot.rom
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./bin/assembler examples/controller.usm bin/boot.rom
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./bin/emulator bin/boot.rom
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./bin/emulator bin/boot.rom
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@ -330,11 +330,6 @@ main(int argc, char **argv)
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devmouse = portuxn(&u, "mouse", defaultrw, defaultrw);
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devmouse = portuxn(&u, "mouse", defaultrw, defaultrw);
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start(&u);
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start(&u);
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echos(&u.wst, 0x40, "stack");
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echom(&u.ram, 0x40, "ram");
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echof(&u);
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quit();
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quit();
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return 0;
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return 0;
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}
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}
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@ -23,18 +23,27 @@ BRK
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|c000 @FRAME
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|c000 @FRAME
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#00 IOR #10 NEQ ,next0 ROT JMP? POP2
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#05 =dev/r ( set dev/read to mouse )
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~y #0001 SUB2 =y
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#04 IOR #01 NEQ ,next0 ROT JMP? POP2
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#00 IOR2 =x #02 IOR2 =y
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@next0
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@next0
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#00 IOR #20 NEQ ,next1 ROT JMP? POP2
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#03 =dev/r ( set dev/read to controller )
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#00 IOR #10 NEQ ,next1 ROT JMP? POP2
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~y #0001 SUB2 =y
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@next1
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#00 IOR #20 NEQ ,next2 ROT JMP? POP2
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~y #0001 ADD2 =y
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~y #0001 ADD2 =y
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@next1
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@next2
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#00 IOR #40 NEQ ,next2 ROT JMP? POP2
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#00 IOR #40 NEQ ,next3 ROT JMP? POP2
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~x #0001 SUB2 =x
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~x #0001 SUB2 =x
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@next2
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@next3
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#00 IOR #80 NEQ ,end ROT JMP? POP2
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#00 IOR #80 NEQ ,end ROT JMP? POP2
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~x #0001 ADD2 =x
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~x #0001 ADD2 =x
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@ -3,21 +3,19 @@
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:dev/r fff8 ( std read port )
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:dev/r fff8 ( std read port )
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:dev/w fff9 ( std write port )
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:dev/w fff9 ( std write port )
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:test 0010
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;x 1 ;y 2
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;x 1 ;y 2
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|0100 @RESET
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|0100 @RESET
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#12 =x
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#12 #34 WSR2
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#1234 =y
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RSW2
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~x
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,test JSR
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~y
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#ef =test
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BRK
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BRK
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@test
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RTS
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|c000 @FRAME BRK
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|c000 @FRAME BRK
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|d000 @ERROR BRK
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|d000 @ERROR BRK
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37
uxn.c
37
uxn.c
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@ -18,6 +18,7 @@ WITH REGARD TO THIS SOFTWARE.
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/* clang-format off */
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/* clang-format off */
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void setflag(Uint8 *a, char flag, int b) { if(b) *a |= flag; else *a &= (~flag); }
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void setflag(Uint8 *a, char flag, int b) { if(b) *a |= flag; else *a &= (~flag); }
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int getflag(Uint8 *a, char flag) { return *a & flag; }
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int getflag(Uint8 *a, char flag) { return *a & flag; }
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void warn(char *s, Uint8 b) { printf("Warning: %s(%d)\n", s, b);}
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void mempoke8(Memory *m, Uint16 a, Uint8 b) { m->dat[a] = b; }
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void mempoke8(Memory *m, Uint16 a, Uint8 b) { m->dat[a] = b; }
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Uint8 mempeek8(Memory *m, Uint16 a) { return m->dat[a]; }
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Uint8 mempeek8(Memory *m, Uint16 a) { return m->dat[a]; }
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void mempoke16(Memory *m, Uint16 a, Uint16 b) { mempoke8(m, a, b >> 8); mempoke8(m, a + 1, b); }
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void mempoke16(Memory *m, Uint16 a, Uint16 b) { mempoke8(m, a, b >> 8); mempoke8(m, a + 1, b); }
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@ -39,17 +40,20 @@ void op_ldr(Uxn *u) { Uint16 a = pop16(&u->wst); push8(&u->wst, mempeek8(&u->ram
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void op_str(Uxn *u) { Uint16 a = pop16(&u->wst); Uint8 b = pop8(&u->wst); mempoke8(&u->ram, a, b); }
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void op_str(Uxn *u) { Uint16 a = pop16(&u->wst); Uint8 b = pop8(&u->wst); mempoke8(&u->ram, a, b); }
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/* Logic */
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/* Logic */
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void op_jmp(Uxn *u) { u->ram.ptr = pop16(&u->wst); }
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void op_jmp(Uxn *u) { u->ram.ptr = pop16(&u->wst); }
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void op_jsr(Uxn *u) { push16(&u->rst, u->ram.ptr); u->ram.ptr = pop16(&u->wst); }
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void op_jsr(Uxn *u) { if(u->balance > 0){ warn("Stack unbalance", u->balance); } push16(&u->rst, u->ram.ptr); u->ram.ptr = pop16(&u->wst); }
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void op_rts(Uxn *u) { u->ram.ptr = pop16(&u->rst); }
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void op_rts(Uxn *u) { if(u->balance > 0){ warn("Stack unbalance", u->balance); } u->ram.ptr = pop16(&u->rst); }
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void op_and(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b & a); }
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void op_ora(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b | a); }
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void op_rol(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b << a); }
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void op_ror(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b >> a); }
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/* Stack */
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/* Stack */
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void op_pop(Uxn *u) { pop8(&u->wst); }
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void op_pop(Uxn *u) { pop8(&u->wst); }
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void op_dup(Uxn *u) { push8(&u->wst, peek8(&u->wst, 0)); }
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void op_dup(Uxn *u) { push8(&u->wst, peek8(&u->wst, 0)); }
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void op_swp(Uxn *u) { Uint8 b = pop8(&u->wst), a = pop8(&u->wst); push8(&u->wst, b); push8(&u->wst, a); }
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void op_swp(Uxn *u) { Uint8 b = pop8(&u->wst), a = pop8(&u->wst); push8(&u->wst, b); push8(&u->wst, a); }
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void op_ovr(Uxn *u) { push8(&u->wst, peek8(&u->wst, 1)); }
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void op_ovr(Uxn *u) { push8(&u->wst, peek8(&u->wst, 1)); }
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void op_rot(Uxn *u) { Uint8 c = pop8(&u->wst), b = pop8(&u->wst), a = pop8(&u->wst); push8(&u->wst, b); push8(&u->wst, c); push8(&u->wst, a); }
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void op_rot(Uxn *u) { Uint8 c = pop8(&u->wst), b = pop8(&u->wst), a = pop8(&u->wst); push8(&u->wst, b); push8(&u->wst, c); push8(&u->wst, a); }
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void op_and(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b & a); }
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void op_wsr(Uxn *u) { Uint8 a = pop8(&u->wst); push8(&u->rst, a); u->balance++; }
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void op_ora(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b | a); }
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void op_rsw(Uxn *u) { Uint8 a = pop8(&u->rst); push8(&u->wst, a); u->balance--; }
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void op_rol(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, b << a); }
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/* Arithmetic */
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/* Arithmetic */
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void op_add(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint8)b + (Sint8)a : b + a); }
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void op_add(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint8)b + (Sint8)a : b + a); }
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void op_sub(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint8)b - (Sint8)a : b - a); }
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void op_sub(Uxn *u) { Uint8 a = pop8(&u->wst), b = pop8(&u->wst); push8(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint8)b - (Sint8)a : b - a); }
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@ -66,15 +70,18 @@ void op_ior16(Uxn *u) { Uint8 a = pop8(&u->wst); Device *dev = &u->dev[mempeek8(
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void op_iow16(Uxn *u) { Uint8 a = pop8(&u->wst); Uint8 b = pop8(&u->wst); Device *dev = &u->dev[mempeek8(&u->ram, u->devw)]; if(dev) { dev->write(dev, &u->ram, b); dev->write(dev, &u->ram, a); } }
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void op_iow16(Uxn *u) { Uint8 a = pop8(&u->wst); Uint8 b = pop8(&u->wst); Device *dev = &u->dev[mempeek8(&u->ram, u->devw)]; if(dev) { dev->write(dev, &u->ram, b); dev->write(dev, &u->ram, a); } }
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void op_ldr16(Uxn *u) { Uint16 a = pop16(&u->wst); push16(&u->wst, mempeek16(&u->ram, a)); }
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void op_ldr16(Uxn *u) { Uint16 a = pop16(&u->wst); push16(&u->wst, mempeek16(&u->ram, a)); }
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void op_str16(Uxn *u) { Uint16 a = pop16(&u->wst); Uint16 b = pop16(&u->wst); mempoke16(&u->ram, a, b); }
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void op_str16(Uxn *u) { Uint16 a = pop16(&u->wst); Uint16 b = pop16(&u->wst); mempoke16(&u->ram, a, b); }
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void op_and16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b & a); }
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void op_ora16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b | a); }
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void op_rol16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b << a); }
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void op_ror16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b >> a); }
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/* Stack(16-bits) */
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/* Stack(16-bits) */
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void op_pop16(Uxn *u) { pop16(&u->wst); }
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void op_pop16(Uxn *u) { pop16(&u->wst); }
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void op_dup16(Uxn *u) { push16(&u->wst, peek16(&u->wst, 0)); }
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void op_dup16(Uxn *u) { push16(&u->wst, peek16(&u->wst, 0)); }
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void op_swp16(Uxn *u) { Uint16 b = pop16(&u->wst), a = pop16(&u->wst); push16(&u->wst, b); push16(&u->wst, a); }
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void op_swp16(Uxn *u) { Uint16 b = pop16(&u->wst), a = pop16(&u->wst); push16(&u->wst, b); push16(&u->wst, a); }
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void op_ovr16(Uxn *u) { push16(&u->wst, peek16(&u->wst, 1)); }
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void op_ovr16(Uxn *u) { push16(&u->wst, peek16(&u->wst, 1)); }
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void op_rot16(Uxn *u) { Uint16 c = pop16(&u->wst), b = pop16(&u->wst), a = pop16(&u->wst); push16(&u->wst, b); push16(&u->wst, c); push16(&u->wst, a); }
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void op_rot16(Uxn *u) { Uint16 c = pop16(&u->wst), b = pop16(&u->wst), a = pop16(&u->wst); push16(&u->wst, b); push16(&u->wst, c); push16(&u->wst, a); }
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void op_and16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b & a); }
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void op_wsr16(Uxn *u) { Uint16 a = pop16(&u->wst); push16(&u->rst, a); u->balance += 2; }
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void op_ora16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b | a); }
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void op_rsw16(Uxn *u) { Uint16 a = pop16(&u->rst); push16(&u->wst, a); u->balance -= 2; }
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void op_rol16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, b << a); }
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/* Arithmetic(16-bits) */
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/* Arithmetic(16-bits) */
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void op_add16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint16)b + (Sint16)a : b + a); }
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void op_add16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint16)b + (Sint16)a : b + a); }
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void op_sub16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint16)b - (Sint16)a : b - a); }
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void op_sub16(Uxn *u) { Uint16 a = pop16(&u->wst), b = pop16(&u->wst); push16(&u->wst, getflag(&u->status, FLAG_SIGN) ? (Sint16)b - (Sint16)a : b - a); }
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void (*ops[])(Uxn *u) = {
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void (*ops[])(Uxn *u) = {
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op_brk, op_nop, op_lit, op_lix, op_ior, op_iow, op_ldr, op_str,
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op_brk, op_nop, op_lit, op_lix, op_ior, op_iow, op_ldr, op_str,
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op_jmp, op_jsr, op_nop, op_rts, op_nop, op_nop, op_nop, op_nop,
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op_jmp, op_jsr, op_nop, op_rts, op_and, op_ora, op_rol, op_ror,
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op_pop, op_dup, op_swp, op_ovr, op_rot, op_and, op_ora, op_rol,
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op_pop, op_dup, op_swp, op_ovr, op_rot, op_wsr, op_rsw, op_nop,
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op_add, op_sub, op_mul, op_div, op_equ, op_neq, op_gth, op_lth,
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op_add, op_sub, op_mul, op_div, op_equ, op_neq, op_gth, op_lth,
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/* 16-bit */
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/* 16-bit */
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op_brk, op_nop16, op_lit16, op_lix, op_ior16, op_iow16, op_ldr16, op_str16,
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op_brk, op_nop16, op_lit16, op_lix, op_ior16, op_iow16, op_ldr16, op_str16,
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op_jmp, op_jsr, op_nop, op_rts, op_nop, op_nop, op_nop, op_nop,
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op_jmp, op_jsr, op_nop, op_rts, op_and16, op_ora16, op_rol16, op_ror16,
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op_pop16, op_dup16, op_swp16, op_ovr16, op_rot16, op_and16, op_ora16, op_rol16,
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op_pop16, op_dup16, op_swp16, op_ovr16, op_rot16, op_wsr16, op_rsw16, op_nop,
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op_add16, op_sub16, op_mul16, op_div16, op_equ16, op_neq16, op_gth16, op_lth16
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op_add16, op_sub16, op_mul16, op_div16, op_equ16, op_neq16, op_gth16, op_lth16
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};
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};
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Uint8 opr[][2] = {
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Uint8 opr[][2] = {
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{0,0}, {0,0}, {0,0}, {0,0}, {1,1}, {1,0}, {2,1}, {3,0},
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{0,0}, {0,0}, {0,0}, {0,0}, {1,1}, {1,0}, {2,1}, {3,0},
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{2,0}, {2,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0},
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{2,0}, {2,0}, {0,0}, {0,0}, {2,1}, {2,1}, {2,1}, {2,1},
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{1,0}, {1,2}, {2,2}, {2,3}, {3,3}, {2,1}, {2,1}, {2,1},
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{1,0}, {1,2}, {2,2}, {2,3}, {3,3}, {1,0}, {0,1}, {2,1},
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{2,1}, {2,1}, {2,1}, {2,1}, {2,1}, {2,1}, {2,1}, {2,1},
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{2,1}, {2,1}, {2,1}, {2,1}, {2,1}, {2,1}, {2,1}, {2,1},
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/* 16-bit */
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/* 16-bit */
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{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, /* TODO */
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{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, /* TODO */
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{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, /* TODO */
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{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, /* TODO */
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{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {0,0}, /* TODO */
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{0,0}, {0,0}, {0,0}, {0,0}, {0,0}, {1,0}, {0,1}, {0,0}, /* TODO */
|
||||||
{4,2}, {4,2}, {4,2}, {4,2}, {4,2}, {4,2}, {4,2}, {4,2}
|
{4,2}, {4,2}, {4,2}, {4,2}, {4,2}, {4,2}, {4,2}, {4,2}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
2
uxn.h
2
uxn.h
|
@ -38,7 +38,7 @@ typedef struct Device {
|
||||||
} Device;
|
} Device;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
Uint8 literal, status, devices;
|
Uint8 literal, status, balance, devices;
|
||||||
Uint16 counter, devr, devw, vreset, vframe, verror;
|
Uint16 counter, devr, devw, vreset, vframe, verror;
|
||||||
St8 wst, rst;
|
St8 wst, rst;
|
||||||
Memory ram;
|
Memory ram;
|
||||||
|
|
Loading…
Reference in New Issue