liblzma: Choose the range decoder variants using a bitmask macro.
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Lasse Collin
parent
0709c2b2d7
commit
de55485cb2
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@ -16,6 +16,35 @@
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#include "range_common.h"
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// Choose the range decoder variants to use using a bitmask.
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// If no bits are set, only the basic version is used.
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// If more than one version is selected for the same feature,
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// the last one on the list below is used.
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//
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// Bitwise-or of the following enable branchless C versions:
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// 0x01 normal bittrees
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// 0x02 fixed-sized reverse bittrees
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// 0x04 variable-sized reverse bittrees (disabled by default, not faster?)
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// 0x08 matched literal (disabled by default, not faster?)
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//
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// GCC & Clang compatible x86-64 inline assembly:
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// 0x010 normal bittrees
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// 0x020 fixed-sized reverse bittrees
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// 0x040 variable-sized reverse bittrees
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// 0x080 matched literal
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// 0x100 direct bits
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//
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// The default can be overriden at build time by defining
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// LZMA_RANGE_DECODER_CONFIG to the desired mask.
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#ifndef LZMA_RANGE_DECODER_CONFIG
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# if defined(__x86_64__) && (defined(__GNUC__) || defined(__clang__))
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# define LZMA_RANGE_DECODER_CONFIG 0x1F0
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# else
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# define LZMA_RANGE_DECODER_CONFIG 0x03
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# endif
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#endif
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// Negative RC_BIT_MODEL_TOTAL but the lowest RC_MOVE_BITS are flipped.
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// This is useful for updating probability variables in branchless decoding:
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//
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@ -369,20 +398,24 @@ do { \
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} while (0)
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// TODO: Testing on x86-64 give an impression that only the main bittrees are
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// worth the branchless C code. It should be tested on other archs for which
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// there isn't assembly code in this file.
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// Testing on x86-64 give an impression that only the normal bittrees and
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// the fixed-sized reverse bittrees are worth the branchless C code.
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// It should be tested on other archs for which there isn't assembly code
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// in this file.
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// Using addition in "(symbol << 1) + rc_mask" allows use of x86 LEA
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// or RISC-V SH1ADD instructions. Compilers might infer it from
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// "(symbol << 1) | rc_mask" too if they see that mask is 0 or 1 but
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// the use of addition doesn't require such analysis from compilers.
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#if LZMA_RANGE_DECODER_CONFIG & 0x01
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#undef rc_bittree_bit
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#define rc_bittree_bit(prob) \
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rc_c_bit(prob, \
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symbol = (symbol << 1) + rc_mask, \
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)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x01
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#if LZMA_RANGE_DECODER_CONFIG & 0x02
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#undef rc_bittree_rev4
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#define rc_bittree_rev4(probs) \
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do { \
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@ -392,20 +425,18 @@ do { \
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rc_c_bit(probs[symbol + 4], symbol += rc_mask << 2, ); \
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rc_c_bit(probs[symbol + 8], symbol += rc_mask << 3, ); \
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} while (0)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x02
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// TODO: Test performance on platforms for which there is no assembly code.
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/*
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#if LZMA_RANGE_DECODER_CONFIG & 0x04
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#undef rc_bit_add_if_1
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#define rc_bit_add_if_1(probs, dest, value_to_add_if_1) \
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rc_c_bit(probs[symbol], \
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symbol = (symbol << 1) + rc_mask, \
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dest += (value_to_add_if_1) & rc_mask)
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*/
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x04
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// TODO: Test on platforms for which there is no assembly code.
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/*
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#if LZMA_RANGE_DECODER_CONFIG & 0x08
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#undef decode_with_match_bit
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#define decode_with_match_bit \
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t_match_byte <<= 1; \
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@ -414,14 +445,14 @@ do { \
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rc_c_bit(probs[t_subcoder_index], \
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symbol = (symbol << 1) + rc_mask, \
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t_offset &= ~t_match_bit ^ rc_mask)
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*/
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x08
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////////////
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// x86-64 //
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////////////
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#if defined(__x86_64__) && (defined(__GNUC__) || defined(__clang__))
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#if LZMA_RANGE_DECODER_CONFIG & 0x1F0
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// rc_asm_y and rc_asm_n are used as arguments to macros to control which
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// strings to include or omit.
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@ -625,6 +656,8 @@ do { \
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"cc", "memory"); \
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} while (0)
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#if LZMA_RANGE_DECODER_CONFIG & 0x010
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#undef rc_bittree3
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#define rc_bittree3(probs_base_var, final_add) \
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rc_asm_bittree_n(probs_base_var, final_add, \
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@ -656,6 +689,7 @@ do { \
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rc_asm_bittree(0, 1, rc_asm_n, rc_asm_y, rc_asm_n) \
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rc_asm_bittree(1, 0, rc_asm_n, rc_asm_n, rc_asm_y) \
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)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x010
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// Fixed-sized reverse bittree
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@ -717,6 +751,7 @@ do { \
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#dcur "(%[probs_base], %q[t1], 2)\n\t" \
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)
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#if LZMA_RANGE_DECODER_CONFIG & 0x020
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#undef rc_bittree_rev4
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#define rc_bittree_rev4(probs_base_var) \
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rc_asm_bittree_n(probs_base_var, 4, \
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@ -725,8 +760,10 @@ rc_asm_bittree_n(probs_base_var, 4, \
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rc_asm_bittree_rev(0, 1, 4, 8, 16, 24, rc_asm_n, rc_asm_y, rc_asm_n) \
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rc_asm_bittree_rev(1, 0, 8, 16, -, -, rc_asm_n, rc_asm_n, rc_asm_y) \
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)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x020
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#if LZMA_RANGE_DECODER_CONFIG & 0x040
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#undef rc_bit_add_if_1
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#define rc_bit_add_if_1(probs_base_var, dest_var, value_to_add_if_1) \
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do { \
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@ -778,6 +815,7 @@ do { \
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: \
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"cc", "memory"); \
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} while (0)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x040
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// Literal decoding uses a normal 8-bit bittree but literal with match byte
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@ -826,6 +864,7 @@ do { \
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"mov %w[prob], (%[probs_base], %q[t1], 1)\n\t"
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#if LZMA_RANGE_DECODER_CONFIG & 0x080
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#undef rc_matched_literal
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#define rc_matched_literal(probs_base_var, match_byte_value) \
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do { \
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@ -867,9 +906,11 @@ do { \
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: \
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"cc", "memory"); \
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} while (0)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x080
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// Doing the loop in asm instead of C seems to help a little.
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#if LZMA_RANGE_DECODER_CONFIG & 0x100
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#undef rc_direct
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#define rc_direct(dest_var, count_var) \
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do { \
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@ -904,6 +945,7 @@ do { \
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: \
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"cc", "memory"); \
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} while (0)
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#endif // LZMA_RANGE_DECODER_CONFIG & 0x100
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#endif // x86_64
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