Devine Lu Linvega
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8bb661ced0
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Converted regs array to stack
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2024-04-23 19:36:49 -07:00 |
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Sebastian LaVine
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f18adb503d
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Replace io_repl.modal with an actual Modal REPL
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2024-04-23 14:09:24 -07:00 |
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Devine Lu Linvega
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3c85bbd3b8
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Exploding empty list -> identity
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2024-04-23 13:51:25 -07:00 |
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Devine Lu Linvega
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14ce4eb176
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Added tests
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2024-04-23 13:45:03 -07:00 |
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Devine Lu Linvega
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c7aad6e21e
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New tests
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2024-04-23 13:29:30 -07:00 |
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Devine Lu Linvega
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083538ada8
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Some tests are failing, but nothing to worry about for now
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2024-04-23 10:29:51 -07:00 |
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Devine Lu Linvega
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a111783887
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Fixed bug with counting parens
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2024-04-23 09:35:58 -07:00 |
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Devine Lu Linvega
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1ed120f569
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Added more whitespace tests
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2024-04-23 08:37:40 -07:00 |
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Devine Lu Linvega
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bb58d295fd
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Added tests for whitespace
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2024-04-23 08:21:35 -07:00 |
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Devine Lu Linvega
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95d8bf3d8e
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Special registers that are non-emitting should erase themselves
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2024-04-22 21:37:40 -07:00 |
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Devine Lu Linvega
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157d1909ea
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Added comments
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2024-04-22 20:50:39 -07:00 |
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Devine Lu Linvega
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91150500dd
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Removed unecessary assign
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2024-04-22 20:32:42 -07:00 |
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Devine Lu Linvega
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b67cf12f60
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Use switch case for special registers
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2024-04-22 20:22:54 -07:00 |
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Devine Lu Linvega
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f7e0e74888
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Moved lambda from rules[0] to its own memory
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2024-04-22 20:15:33 -07:00 |
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Devine Lu Linvega
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701d2c43a5
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Do not continue after lambda rewrite
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2024-04-22 20:13:19 -07:00 |
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Devine Lu Linvega
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ba48cfffa6
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Rewind
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2024-04-22 20:08:29 -07:00 |
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Devine Lu Linvega
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9c95b4567b
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Return lambda to its own memory
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2024-04-22 18:02:27 -07:00 |
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Devine Lu Linvega
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7a27c2ca5b
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Housekeeping
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2024-04-22 17:54:17 -07:00 |
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Devine Lu Linvega
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9b034eac95
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Merged all regs needing functions
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2024-04-22 17:43:35 -07:00 |
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Devine Lu Linvega
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4fce0e83e5
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Abstracted match/write rule
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2024-04-22 17:39:39 -07:00 |
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Devine Lu Linvega
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8e7bbb51d7
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Store lambda in rules[0]
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2024-04-22 17:27:34 -07:00 |
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Devine Lu Linvega
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e153eb797b
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Print unused rules
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2024-04-22 15:29:54 -07:00 |
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Devine Lu Linvega
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6fb9f96b0c
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Oups
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2024-04-22 10:10:55 -07:00 |
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Devine Lu Linvega
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aa0cc80455
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Inlined set_reg
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2024-04-22 09:54:41 -07:00 |
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Devine Lu Linvega
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94d9ecfa72
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Renamed shirt.modal to postcard.modal
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2024-04-21 19:34:43 -07:00 |
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Devine Lu Linvega
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150d0ff032
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Improved init for sierpinski
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2024-04-21 18:06:08 -07:00 |
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Devine Lu Linvega
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0be295a237
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Added sierpinski to examples/
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2024-04-21 16:47:27 -07:00 |
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Devine Lu Linvega
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ed5c0763e2
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Warn on imbalance
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2024-04-21 09:46:53 -07:00 |
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Devine Lu Linvega
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111e143d2f
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Added tests
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2024-04-21 09:43:00 -07:00 |
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Devine Lu Linvega
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05e620bac5
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Inlined create_rule
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2024-04-21 09:24:05 -07:00 |
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Devine Lu Linvega
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73e9ebcfdd
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Only check for register value once
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2024-04-21 09:13:30 -07:00 |
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Devine Lu Linvega
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a2f60e12ff
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Removed old test
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2024-04-20 22:34:28 -07:00 |
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Devine Lu Linvega
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7a124eb70f
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Do not pass last to write_rule
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2024-04-20 22:31:58 -07:00 |
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Devine Lu Linvega
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222c7f6f4c
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Blacklist ?) register
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2024-04-20 21:50:56 -07:00 |
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Devine Lu Linvega
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4322d96ee2
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Improved native substring capabilities
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2024-04-20 18:56:04 -07:00 |
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Devine Lu Linvega
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9295a4d2b4
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Added tests
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2024-04-20 12:38:05 -07:00 |
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Devine Lu Linvega
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529777fcb4
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Can merge token during reg writing
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2024-04-20 12:06:32 -07:00 |
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Devine Lu Linvega
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9029c64c77
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A register is surrounded by spacers
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2024-04-20 12:00:25 -07:00 |
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Devine Lu Linvega
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b725a608da
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Escape question marks
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2024-04-20 11:26:57 -07:00 |
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Devine Lu Linvega
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f139f3218e
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Do not injest register on empty put_reg
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2024-04-20 11:09:43 -07:00 |
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Devine Lu Linvega
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6a61088a70
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Use cached data in register
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2024-04-20 11:01:20 -07:00 |
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Devine Lu Linvega
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0e6e963425
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Fixed issue with matching tokens of different length
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2024-04-19 14:08:18 -07:00 |
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Devine Lu Linvega
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6f89fb02bc
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Added postcard example
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2024-04-19 11:10:37 -07:00 |
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Devine Lu Linvega
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bc3165d7e6
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Added documentation for flags
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2024-04-18 11:45:32 -07:00 |
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Devine Lu Linvega
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f35eb2c8ec
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Added quiet/infinite flags
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2024-04-18 11:33:23 -07:00 |
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Devine Lu Linvega
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40ef57ebf5
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Added fizzbuzz example
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2024-04-18 11:00:08 -07:00 |
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Devine Lu Linvega
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21782ba7ba
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Added a test for self-erasing token
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2024-04-17 11:49:32 -07:00 |
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Devine Lu Linvega
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7a93de35ad
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Fixes issue with trailing ws
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2024-04-17 11:40:47 -07:00 |
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Devine Lu Linvega
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88649fce12
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Fixes whitespace bug
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2024-04-17 11:18:37 -07:00 |
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Devine Lu Linvega
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44e809f092
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Updated tests to match new registers
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2024-04-17 10:56:51 -07:00 |